Cool Verification Mentioned on EETimes Blog

From Richard Goering’s blog on EETimes…

“Meanwhile, for an engineer's view of DATE, check out the blog of verification engineer J.L. Gray. You can read about everything from Gray's flight delays en route to Nice to the keynotes, panels, and product announcements that caught Gray's attention. It's all part of an ongoing independent blog in which Gray shares his perspectives on IC verification.”

Thanks Richard!

Day 3 – DFI, Space, and Communication with the Evil Mentor Space Overlord

Update June 12, 2007: Fixed out of date links to the Verilab blog.

By Thursday, I was exhausted, and most of the interesting sessions from a verification perspective had wrapped up.  However, I did attend an interesting panel discussion on a new DRAM PHY Interface standardization effort.  I also noticed that Verilab's very own David Robinson had finally worked out all of the details surrounding the publication of his book, "Aspect Oriented Programming with the e Verification Language".  The book will be available August in the US and September in Europe. 

During the afternoon I attended sessions on "SAT Techniques for Verification", "Management of Technologies Obsolescence and Supplier Dependence", and "Model-based Development of Embedded Control Systems".  Having stayed up until 2:30am the previous evening writing entries for this blog and the Verilab blog, it was all I could do to keep my eyes open during these sessions, and so I decided to take a walk back to my hotel.  Sadly, that meant I missed Peggy Aycinea's panel discussion on "Towards Total Open Source in Aeronautics and Space?".

Before I left the conference I swung by the Mentor Graphics booth to chat with the verification team about the current status of the AVM and Mentor SystemVerilog support.  While I was there, I had the horrifying realization that Mentor Graphics is actually controlled by an evil space overlord, as evidenced by the picture above.  Now, I was told that I was simply playing space invaders on a system made up of an emulator and a SystemC software layer, but we all know the truth, don't we.


Friday at DATE is a day for in-depth workshops on a variety of topics.  I considered going to either a UML or Embedded Security workshop, but didn't feel the need to shell out 160 Euros for a session that might end up putting me to sleep.  I'm leaving Nice this evening for a trip up to Paris to visit an old high school friend, and will be back in the States Sunday night.  I can already tell that I'm going to have a fun day in the office on Monday.

DRAM PHY Interface Panel Discussion

Thursday morning I attended a panel discussion about a new DRAM PHY Interface (DFI) standardization effort.  Hosted by Denali, and moderated by Graham Prophet, Editor for EDN Europe, the panel members shared their thoughts on why standardizing the interface between a DDR/DDR2 memory controller and the associated PHY was important.  Panel members included Badawi Dweik from ARM, Mark Gogolewski, CTO of Denali, Bryan Jones, Program Manager – IP Outsourcing, from Intel, Kimkinyona Fox from Rambus, and Navraj Nandra from Synopsys.

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Day 2 – Security, Synopsys VMM, UCSI, and more!

Update June 12, 2007: Fixed out of date links to the Verilab blog.

First off, I've written up posts on the CoWare portion of the keynote, Cadence uRM, and Synopsys SystemVerilog support over on the Verilab blog.  Take a look when you get a chance! Today I had some time in the morning to check out a portion of the "Security and Trust in Ubiquitous Communications" session, specifically, the presentation on "Design Methods for Security and Trust" by Ingrid Verbauwhede and Patrick Schaumont.  It was fascinating and a bit scary to hear descriptions of how easy it is to crack encryption keys of many devices by simply analyzing the instantaneous power usage of a device or by monitoring electromagnetic radiation of a device.  Even worse, each proposed solution had additional drawbacks that made it susceptible to hacking.  Verbauwhede described the funny looks she gets from colleagues when she tells them she has covered her RFID-enabled Belgian passport with aluminum foil.  Frankly, I can't blame either her or her friends.

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Day 1 - ESL, URM, and SPIRIT

  DATE Registration Desk 
  Originally uploaded by brillianthue.

Update June 12, 2007: Fixed out of date links to the Verilab blog.

So, many of you are probably dying to know what I've been up to all day.  Did I skip out of the conference and go to the beach?  (sadly, no).  Did I fall asleep during any of the presentations due to my jet lag and 4-5 hours of sleep last night?  (sadly, almost yes, several times!).

So far, it looks like this is going to be an interesting week.  I attended the keynote, and spent part of the morning in the System Level Mapping and Simulation track before skipping out to grab a bite to eat and to continue browsing through the exhibition area.  During the afternoon I attended the Cadence/Doulos workshop on "Adopting a Plan-to-Closure Methodology across Design Teams and Verification Teams" to learn about the Unified Reuse Methodology (URM) and its current status and hung out in the press lounge where I had the opportunity to meet Peter Clarke, Editorial Director Europe, and Richard Wallace, Vice President and Editorial Director for EETimes.  Peter apparently was one of the first people to interview Tommy Kelly, Verilab's CEO, when Verilab started back in 2000.  I've yet to meet any members of the "professional" press who were terribly interested in my blog, but I appreciated the fact that Peter spent far more time chatting with me than most of the others have.   Later in the evening I attended the SPIRIT Consortium's general meeting.

Other highlights during the day?  I spent time with Denali speaking with the booth crew (including CTO Mark Gogolewski) about PureSpec SystemRDL, a "verification IP product that automates functional verification of configuration registers for system-on-chip (SoC) designs."  I wrote about Blueprint, a documentation generation tool that uses SystemRDL as a specification language, back in December of 2005.  It was nice to see Denali is continuing to move forward with products in this area.

Finally, I ran into a few former colleagues throughout the day from consulting gigs I've done in France and Germany over the last couple of years. That was a real treat.  Those of you I met up with today - glad you were able to make it to DATE! 

Too Many Cookies?

Is it possible to eat too many cookies on a transatlantic flight?  Based on my current research so far, it is possible, and for me, 7-8 cookies seem to be the limit! 

I finally arrived in Nice around 5:30pm this evening, and made it to my hotel shortly thereafter.  I've already had to switch rooms due to lack of a working internet connection/TV, and my new room has no curtains, so the housekeepers came in and put white bed sheets over the wooden shutters to keep some of the light out.  I don't think it's going to work well, but I'm hoping I'll be so tired tonight I won't care.  Oh, and did I mention the Internet doesn't work in my new room either?  But, it turns out there is an Orange WiFi network that can be used instead.  Perhaps I should have stayed in my original room!

I had a massive dinner at a Cuban restaurant several blocks away from the hotel with a couple of my colleagues from Verilab.  They're either European or have been over here for a week or two and weren't jet lagged at all.  Why they wanted to stay up until almost midnight I have no idea, but here I am at 1:30am Tuesday morning trying to check my email and get ready for the conference in the morning.

Questions, Always Questions

When I went to DVCon back in February I had the best of intentions.  I queried everyone at Verilab to come up with a list of intelligent questions that I could ask the various presenters.  Then, while I was there I realized that it was difficult enough to capture what was happening, let alone to track down someone who would know the answer.  The chance to ask these questions has passed, but in an attempt to inspire myself for the week ahead, I thought I'd share with everyone the questions I was hoping to answer at DVCon:

  • Why does each EDA company think its tool flow is so much better than all the rest?
  • Why is there such a focus on coverage these days as opposed to stimulus and response checking?  Do the major players in EDA feel these problems have been addressed and that coverage is the last difficult problem to tackle in this area?
  • What's going on with the SPIRIT consortium? 
  • What is the interest level in SystemVerilog for testbench development.
  • Has there been any progress in coming up with transaction level modeling standards to allow interoperability between SystemC models from various vendors, particularly cycle-based vs. event-based models?
  • When will System Verilog Assertions be truly integrated with 'e'?  What will happen to the 'e' temporal language?
  • Will Cadence provide SystemVerilog libraries to support things like sequences?  How will these be implemented given the lack of AOP/when inheritance in SystemVerilog?

I don't have the DATE program available as I'm writing this post, so I'm not sure whether there specific sessions that would help me answer some of the above questions.  I do believe there is some activity related to the SPIRIT consortium.  I'll need to confirm that when I have an Internet connection (and when I've had some sleep).

On the Road Again – DATE 2007

I went to bed late yesterday evening, so when the alarm started going off at 8:15 this morning I didn't initially pay much attention.  Then, random snippets of radio news started to appear out of the fog.  "Massive storm"… "Flight cancellations"… "New York"… New York?!?!  I immediately jumped out of bed and ran to the phone to call Delta.  My flight to Nice was scheduled to leave Austin around 1:30pm, connecting through JFK with an hour long layover, and then heading out to Nice.  When I finally got through to a Delta agent she seemed perplexed.  Cancellations?  Bad weather?  She hadn't heard about anything like that.  Each time I persisted she went back and talked to her supervisor.  Each time she came back we had a bit more information but not the complete picture.  Finally, after about an hour it became clear that my flight was probably going to be canceled, but that there were no other flights available to Nice.  Is there someone else I can talk with?  Ah yes, the second level supervisor.  This is a weather problem… nothing we can do, he told me patiently.  Except for the part that the previous evening I had called Delta after noticing someone had double booked me on another flight to Nice going through Atlanta and Rome.  The agent at that time told me that was a remnant of a previous reservation, and quickly cancelled the whole thing, not realizing that someone from the airport had booked me an extra flight just in case the weather turned bad.  Now, the next morning I realized that I was, to put it mildly, screwed.  Damn.

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