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UVM Register Package Survey Results

A little over a month ago I sent out a request for your feedback on the possibility of adding a standardized register package to the UVM. Over the next 10 days I received 119 entries, 107 of which I consider valid (meaning they included an apparently real name and company email address, and did not appear to be duplicate submissions). Those 107 entries came from 63 different companies. The goal of the survey was to allow me to provide better input into the Accellera Verification IP TSC on whether a register package should be part of the UVM at some point.  The survey included the following questions:

  1. Which SystemVerilog register package do you currently use?
    • Cadence
    • Mentor
    • Synopsys
    • Multiple
    • Home grown
    • None
    • Other 
  2. How important is it that the UVM contain a register package?
    • Critical - we won't adopt the UVM without it
    • Important - should be in the first release, but would be satisfied with the UVM even without this feature
    • Low - Happy with whatever the TSC comes up with
    • Don't care at all 
  3. Would you be willing to delay the release of the UVM so that it could include a register package?
    • Yes
    • No
    • Don't Care 

Many respondents also included comments. I’m going through those comments and will share them once I have a chance to scrub them of any personally identifying information. So, without further ado, here are the results. Values are listed as the number of responses for each answer.

Question 1: Which SystemVerilog register package do you currently use?

Cadence 21
Mentor 4
Synopsys 57
vr_ad 1
Multiple 6
Home grown 8
None 10

Though it's definitely tempting, I'm not going to read anything about relative market share of register packages into these numbers. Why not? Because the results of the survey are influenced not just by reality but by how heavily each vendor chose to promote the survey with their customers. More interesting, I think, and less vendor dependent are the answers to the following two questions.

Question 2: How important is it that the UVM contain a register package?

Critical 61
Important 34
Low 9
Don't care at all 3

Question 3: Would you be willing to delay the release of the UVM so that it could include a register package?

Yes 80
No 19
Don't Care 8

A full 89% of respondents want to see the UVM include a register package, and 75% would be willing to delay the release of the UVM so that a register package could be included. Here are the results for question 2 broken down by register package.


Critical Cadence 11
  Home grown 6
  Multiple 3
  Synopsys 40
  vr_ad 1

Important Cadence 10
  Home grown 1
  Mentor 3
  Multiple 2
  None 5
  Synopsys 13

Low Home grown 1
  Multiple 1
  None 4
  Synopsys 3

Don't care at all Mentor 1
  None 1
  Synopsys 1

Personally, I’ve witnessed too many of my clients struggle over what register package to use. Many of them would benefit from an industry-standard register package. Of course, some of them would also feel they could do a better job than any of the vendor packages with some side coding done over the weekend. For those engineers, having an industry standard package available may obviate the desire to write something from scratch.

Comments