SVUG in Austin, Thursday, October 2
Verification Now - One Down, Four to Go!

This Week - Verification Now in Santa Clara

Verification_now_logo_2Tuesday we'll be kicking off the Verification Now "world tour" in Santa Clara.  As I mentioned a few weeks back the seminar consists of two topics.   

The first, on Requirements Based Verification, covers a topic that comes up time and time again at each client I work with - the problem of developing a comprehensive set of requirements and then prioritizing those requirements.  My colleague, David Robinson, recently wrote up an excellent article discussing the value of verification processes, which, at its core, is what RBV is all about.  Now, many people think that it's a much better idea to just get started coding on what you already know to be the major features of your testbench.  The theory being that the rest of the details will fall out of your initial coding process. 

On a slightly unrelated note, last week I went to a restaurant where they served up a delicious batch of migas (which happens to be one of my favorite dishes).  I had some leftovers and took them home, planning to eat them the next day.  Unfortunately, I forgot about them until the following day, when the leftovers were two days old.  I remember thinking, I'm sure eating these will be just fine - it genuinely seemed like a good idea at the time.  But let me tell you, looking back, it wasn't.  I'll leave you to draw your own tie in to my discussion of RBV above. ;-)

The second presentation, on stimulus generation, was designed to answer a few fundamental questions.  First, what are the basic components that make up a desirable stimulus generation solution in modern testbenches.  The answer?  Transactions, sequences, virtual sequences, and related sequencers.  Next, do these concepts exist in the VMM and OVM?  The answer?  Yes, with very similar capabilities.  The presentation walks through the different stimulus components and shows how they manifest themselves in both the VMM and OVM (with side-by-side comparisons).  Then I discuss a few issues that come up when you construct your stimulus in this manner, such as the way sequences interact with drivers (push vs. pull), ways to deal with shared resource access (where I show off some  future enhancements to the VMM that Verilab presented at BSNUG a couple of weeks ago).  Finally, I provide some tips for dealing with hierarchical randomization issues. 

I'm excited to have the opportunity to present this material and visit with engineers in Santa Clara, Austin, Japan, Taiwan, and Israel.  I'm also especially interested to meet with readers of this blog.  So, if you're planning on attending one of the Verification Now seminars let me know - I'd love to meet you (and who knows, I might even be persuaded to buy you a drink)!  Here's the seminar schedule:

  • Santa Clara - Tuesday, October 14
  • Austin - Tuesday, October 21
  • Yokohama, Japan - Monday, October 27
  • Taipei, Taiwan - Friday, October 31
  • Herzliya, Israel - Monday, November 3

Now, don't tell my wife, but the other reason I'm excited about this trip is that I'm hoping to get my first full night of sleep since my son was born six weeks ago!  If you have any questions about the seminar let me know and I'll try my best to motivate you to attend!