Ok, now that I've got the DVCon schedule in proper calendar format, I've been able to sit down and start looking at which sessions I'm interested in attending. Here's what I'm planning to see so far:
- Tutorial 1 - The Open Verification Methodology (OVM): Opening the Door to Verification Productivity and Interoperability
- Tutorial 3 - Low-Power, Assertion, and SystemVerilog Verification Strategies for Logic Designers
- Session 2 - Applications of the System Verilog Direct Programming Interface
- Session 4 - SystemC in Verification
- Keynote - Ending Endless Verification
- Troublemaker's Panel
- Embedded Tutorial 2 - What is New and Relevant in EDA Standards Today?
One obvious choice for Thursday morning would be the "SystemVerilog Verification Methodology" session (session 6). However, the presentations are entirely vendor driven (Mentor and Cadence). I'm not sure I've met John Rose from Mentor in person though - if he's going to be there I may have to stop by and introduce myself. I've met the others at past conferences (Tom Fitzpatrick, Rich Edelman, Johnathan Bromley and I think Dave Rich).
I'm also not sure I can sit through two sessions in a week on the OVM (Tuesday tutorial plus the Thursday lunch panel). In fact, I'm not sure I can sit through one! I've been calling into recent Cadence webcasts on the topic and also saw a good demo at CDNLive! last September. And as I recall, the food at the Cadence sponsored lunch last year was pretty mediocre. If this is the same presentation material as the other demos I've seen, well, I guess I could spend some quality time pretending to look busy while reading Ken Follett's "The Pillars of the Earth", Techcrunch and/or the Wall Street Journal on my Kindle!
The other thing I'm trying to take into account is that last year I spent a lot of time focusing on the keynote speeches and panels. This year I'd like to spend more time focused on user-generated content.
Anyone have any suggestions regarding sessions I ought to consider attending?