Regular readers of Cool Verification may have noticed a slowdown in posting over the last couple of months. I've always hated those posts on other blogs where someone whines about how busy they've been and how they haven't posted and won't be posting anytime soon. So, I'd like to point out that I actually haven't been absent from posting, I've just not posted as much on this blog. So what have I been up to instead? As I mentioned back at the beginning of June we finally unveiled the new Verilab website and associated blog. The following week, David Robinson, Jason Sprott, Terry Lawell, and myself all attended DAC and wrote up many of our observations, and were even mentioned in the EETimes for our work. Topics included:
- Synopsys VMM and the VMM User's Group
- SystemVerilog Methodologies
- Carbon Design
- Denali Party and the Future of DAC, as well as Denali's SystemRDL
- Algorithmic Testbench Synthesis
- Power-Aware Verification
- Averant on Formal Verification
There were other posts in there as well but presumably you can wade through the material yourself if you're interested.
In addition to the DAC coverage, the blog also contains an overview of the state of parallel computing written by Will Partain. Will is Verilab's systems administrator extraordinaire, a Haskell guru, and maintainer of the open source Arusha project. Will is based in the UK, but is known around the world. For instance, an apps engineer here in Austin from Mentor Graphics knew I was talking about Will after I mentioned I worked with a guy who went to college in Texas but grew up in Africa. I waited, jaw-dropped, for Ashton Kutcher to pop out and let me know I'd been Punk'd, but no, it was really true. If you don't know Will, his article is as good of a way as any to be introduced.