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Mentor Says e/Vera On Decline… Cadence Says, Not Yet!

Update - March 1, 2007: Tom Fitzpatrick from Mentor Graphics has responded to Mike's comments.  For his response, please read Fitzpatrick on SystemVerilog.

Update - February 23, 2007: Just to let everyone know, I contacted Mentor for a rebuttal comment before publishing this story and have shared this material with them since.  If they or Synopsys care to comment for this story I will be more than happy to provide the space for them to do so.  And, as I mentioned at the end of this article, I would be happy to take a look at any existing 3rd-party numbers that may exist regarding the realities about SystemVerilog vs. e adoption rates.

At yesterday's AVM tutorial, Tom Fitzpatrick from Mentor Graphics made a statement that caught my attention.  He declared that "SystemC and SystemVerilog are the only two growing verification standards", and that e and Vera were on the decline.  In the interest of fairness I decided to check with Mike Stellfox, Principal Field Verification Methodologist for Cadence Design Systems.  This was his response:

"It is interesting that Tom would say that SystemVerilog and SystemC are the only two growing verification standards, and that e and Vera are losing ground – I'm sure it has nothing to do with the fact that he works for Mentor and they don't offer an e or Vera solution. The fact is that Specman/e usage continues to grow -  Specman added over 20 new customers logos in 2006, on top of the over 10 logos in 2005 (now nearly 400 customers using e), and Cadence estimates there are over 75,000,000 lines (and growing) of e code in use today. 

"Another interesting stat is that Cadence has recently expanded its presence in over 40 accounts where we displaced other simulators that had previously been working with Specman with the Incisive Enterprise Simulator (where Specman is built in).  It's interesting to note that a significant share of those displacements were Modelsim from Mentor.  Therefore we clearly see Specman/e market growth.  Cadence also sees strong SystemC growth, where I should point out that Cadence has been one of the EDA companies pioneering it for many years in the industry (long before Mentor jumped on the bandwagon). 

"The primary application where we see customers using SystemC is for Transaction Level Modeling (TLM) for early architecture exploration or providing a virtual prototype for early software development, and to a lesser extent for testbench development where we clearly see that most customers prefer e or SystemVerilog – especially when you look at creating constrained random, coverage driven testbenches.  Finally, we also see significant growth in the SystemVerilog market, especially given the fact that it is the newest and therefore is starting from a much smaller base than SystemC or e which are both widely adopted and have been in use for many years.  SystemVerilog is appealing to a lot of people who haven't really adopted constrained random coverage driven verification methodology since everyone is talking about it now.  However, I have found that most customers using e don't see any technical benefits for moving to SystemVerilog, and actually see some limitations and immaturity compared to their current solution (I have heard similar things from Vera customers). 

"The bottom line is that verification is a huge problem today and there will likely continue to be multiple languages required to solve the complete problems at hand.  Cadence is investing in providing the best multi-language simulation platform and methodology with a focus on seamless interoperability between the languages, and IP designed in e, SystemVerilog, or SystemC, so that customers can choose what they feel is best for the task at hand, and still have the capability to leverage IP that may be available in a different language."

It was interesting to see some numbers from Cadence on the current status of Specman usage.  Comments from Mentor and Synopsys (and anyone else for that matter), are definitely welcome!  I find it fascinating from and user perspective that Cadence, Synopsys, and Mentor can look at the verification landscape and come up with such dramatically different opinions.  I haven't seen any numbers from Mentor or Synopsys – does anyone know where to find third party data describing the HVL market?  If so, let me know!  I imagine a similar discussion will play out later today at the low-power panel hosted by Synopsys.  I'll be there, if for no other reason than to see if the attendees are able to stay in their seats, or if tempers will flare (as a few different people have suggested to me could occur).

 

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