Potential Flaws in Cummings' SNUG2002SJ_FIFO2 Design
FIFO Discussion Continues

No Introspection in SystemVerilog

Wow, that didn't take long.  Just a few days in to some work with SystemVerilog and I'm starting to feel like I'm back in SystemC land again.  One of the first things I wanted to do in my small SystemVerilog environment was to print out the data structure that I'm working on.  Sadly, printing an object in SV seems to only print out a list of the actual values of the underlying object, not the overall structure of the object itself.  That means I'll have to write some code (as I did in the past when building something similar in SystemC) to create a sort of super-object which I'll refer to from here on out as a 'blob'.  I'll define a blob as having the following features:

  • Ability to distinguish between fields used to capture data that may eventually be sent to the DUT and other fields used to control randomization, maintain object status, statistics, etc.
  • Allows a user to enumerate through all of the fields in an object and determine their type and pretty name.
  • Using the metadata created in the previous two bullets, implement copy(), clone(), print(), and toString() methods.

Let's face it - verification engineers are busy.  Having to waste time hand coding the same functions over and over again for each new class you write is a real pain and gets in the way of getting real verification work done.  I would be interested to hear why introspection wasn't included in the SystemVerilog specification, and whether it may be included at some point in the future.  Anyone with first hand knowledge care to comment?

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