June 12, 2008: Updated the category of the post and fixed a typo.
Sad to say, I'm actually sitting at the DAC Denali party with my laptop writing this. Figured it would be worth a shot to try something different - why wait till late this evening when I can post now with the help of my camera, laptop, and AT&T WAN card! BTW... I should mention in advance that this post reads better to the tune of "Superfreak!" Super Freaky for sure...
Finally - time to kick back and relax at the Denali party! I'll be heading over there shortly with my laptop and camera. If I can get an internet connection on my WAN card I may even post some quick images of the event.
One thing I really should be doing though instead of going to the party is preparing for the blogging Birds of a Feather session tomorrow evening at 6pm in room 201B - I've thrown together a few slides describing quickly the stages of blogging from a newbie's perspective, then revisiting from the perspective of what actually happens once you take the plunge! I then discuss the benefits I feel blogging brings to the table both personally and for the industry. Hopefully it will all be finished within about 5 minutes so we have time for the other speakers and some in-depth discussion with attendees. Anyone else have any thoughts as to what we should cover? John Busco had some good ideas of topics to discuss (I've shamelessly lifted them and will be proffering some of them as discussion topics tomorrow evening). Feel free to add additional topics below.
Day one at DAC is half way over. The general perception I've gotten from many of the vendors is that things seem slow. Many didn't realize that it is cheap/free to get in the exhibition hall all week and were surprised at the turnout as they thought it was "free Monday." Turnout was light at my presentation this morning as well, though perhaps "light" isn't the right word for it. I ended up giving my talk about SystemVerilog Interoperability to Janick Bergeron (Synopsys, author of the VMM book), Cliff Cummings (Sunburst Design, SystemVerilog trainer and member of the SV and Verilog standard committees), Allan Crone (Mentor Graphics OVM guru), and Mark Glasser (Mentor Graphics OVM guru). All I needed was to have someone like Mike Stellfox or Stan Krolikoski from Cadence join us and we could have had our own panel discussion on VMM vs. Cadence OVM vs. Mentor OVM! To say I was nervous would be a bit of an understatement :-).
Continue reading "SystemVerilog Interoperability for Heavy Hitters!" »
I've been buried the last few weeks but finally have a few spare minutes to let everyone know what I'm up to at DAC this year. Unlike last year where I basically just wandered around taking photos and writing blog posts, this year I'm giving a presentation, running a Birds of a Feather session, and participating in at least one panel (but possibly two).
Continue reading "JL@DAC - SystemVerilog Interoperability, Birds of a Feather, and Panels" »
This just in from Andy Piziali, Chairman of the IEEE 1647 e Language Working Group - IEEE 1647-2008 has just been released! New features include (from the press release):
Richard Goering had an interesting writeup over at SCDsource on the announcement but made the mistake of quoting Gary Smith:
Gary Smith, chief analyst at Gary Smith EDA, said that SystemVerilog and "e" are not natural competitors. The "e" language, he said, is typically used in large system designs, while SystemVerilog is an RTL language that replaces Verilog. What "e" language backers need to watch, he said, is SystemC – but SystemC's test class library is still "fairly immature."
Huh? I'm sorry, but the SystemC SCV library, IMHO, competes (poorly) with SystemVerilog. I don't know of many companies using SystemC for verification. Of the two I'm thinking of, one of them didn't even know that there was such a thing as SCV until I mentioned it to them recently. In fact, I'd be interested to hear if any readers of this blog actually use SCV or better yet, even use SystemC for real constrained random verification work (not modeling - I know it's popular in that area). Gary has fallen victim to the fallacy that SystemVerilog is a single language when, in reality, it is three (design, testbench, and assertions). The e language competes (rather well thank you very much) with the "Testbench" portion of SystemVerilog. Based on the above comment I'd say Gary is not smarter than a 5th grader!
As always, questions and comments welcome.
Richard Goering has just posted an article over at SCDsource on today's announcement that the VMM is now available under an open source license - it's a good read, made even better by some thoughtful quotes from yours truly!
Newsflash - I just got a note from Karen Bartleson at Synopsys letting me know that the VMM is now available for download under an Apache 2.0 open source license! This is good news - for months the debate between OVM and VMM has been centered around the licensing terms required for each. Now we can focus on the actual technical differences between the libraries. I'm also hoping that it won't be long before we see new simulator versions from Cadence, Mentor, and Synopsys that can read both libraries (given the interest each vendor will have in stealing away customers from one another). This should certainly add some spice to the work of the Accellera VIP TSC!
Also, on another interesting note, I just noticed today that Janick Bergeron of VMM fame has now started his very own blog, Verification Martial Arts. Welcome to the blogosphere, Janick! Now we just need to get some folks from Mentor and Cadence blogging and we can have all sorts of fun :-).
Time is progressing and unfortunately I haven't done as much as I'd like to organize the Birds of a Feather session I proposed a couple of months ago. Why not? Some of you may have noticed my blog went into a bit of a hiatus during the March and April time frame. Why? Well, the reason was related to issues surrounding the relationship between Cool Verification and my employer, Verilab. What were these issues, you may ask? My boss, Tommy Kelly (Verilab's CEO) has done a good job of summarizing the ins and outs of Corporate Blogging and the issues he and I faced on his new blog, Darkling Wood. Topics include:
The end results of our discussions were that I'm back to blogging again and Tommy himself has taken the blogging plunge! Perfect timing, as it provides yet another topic of interest for the DAC 2008 Birds of a Feather session on blogging. Now, as I mentioned I've done a crappy job promoting this, but here is the general idea. Send me your name letting me know you're going to attend. Show up somewhere in the neighborhood of rooms 201B and 201C at the Anaheim convention center on Wednesday, June 11 around 6pm. I'll be there and so will at least 3-4 others who have confirmed with me. If 10 confirm by the Wednesday afternoon of DAC we'll actually have a room. If less, we'll go grab a beer and have some ad hoc discussions.
Who should attend? Bloggers, people interested in starting to blog, marketing directors looking for info on how best to communicate with bloggers (hint, don't send me a form mail, personalize!), CEOs wondering how to get their employees to start blogging, and anyone else curious about the impact blogging is already starting to have on the EDA industry.
So, send me a note if your planning on attending. Also, feel free to catch up with me any time at DAC itself - I'll be presenting at the Real Intent booth on Monday, June 9 (more details to come soon) and may also be seen hanging out around the Novas booth with my colleague David Robinson who will be speaking on the topic of Verification Planning Monday through Wednesday.
As I mentioned last week, Verilab is now a member of Accellera. I've been involved with the newly formed Verification IP Technical Standards Committee. One of the first objectives of the committee will be to create a Design Objectives Document, otherwise known as a DOD. Some possible objectives of the committee were presented yesterday during the weekly TSC conference call which spawned an email thread between some of the participants (including myself). The issue being - what is the scope of the committee? Is it to come up with a common methodology to be used by all vendors? Is it to create an API to be used to allow communication between competing methodologies? Or, is the purpose of the committee more basic than that?
At DVCon this past February I had the pleasure of meeting Ron Ploof, New Media Evangelist for Synopsys. Ron helps run (among other things) the Synopsys blogging site. He also has his own blog, RonAmok! Earlier today Ron posted a video describing his experiences after posting a video about his bad experience with buying flowers online (got that?). It's a fascinating look at what happens when your average, everyday Joe (or Ron in this case) posts content about a company on the Internet. Though I've never posted video, I have seen this sort of thing happen on Cool Verification. I'd highly recommend folks take a look (and special kudos to Ron - I'm impressed with the quality of the video!).
Recent Comments