Cool Verification

Breaking your products so your customers won't have to.
Thoughts on hardware verification, the EDA industry, and related topics from the perspective of JL Gray, a verification consultant at Verilab.

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  • About Cool Verification
  • About JL Gray
  • DVCon 2011 "Making Great Products Great" Panelist Bios

Recent Posts

  • DVCon 2012: The Resurgence of Chip Design
  • UVM and the Death of SystemVerilog
  • 48th DAC Day 1: Cloud Computing, Registers
  • Project Planning Birds-of-a-Feather at 48th DAC?
  • Cool Verification on Facebook, Twitter
  • Free Panel, and Photos from DVCon 2011 Day 2
  • California Academy of Sciences Photos
  • DVCon 2011: What engineers don't know about making great products
  • DVCon 2011 Starts with a Bang: UVM Tutorial
  • Virtual Panel Discussion: System Level Verification on Thursday, November 18

Categories

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Archives

  • February 2012
  • August 2011
  • June 2011
  • May 2011
  • March 2011
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  • November 2010
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  • May 2010

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About Cool Verification

Welcome to Cool Verification - a constrained random collection of articles about my experiences as a verification consultant with Verilab.  New to this site and/or to blogging in general?  Get started on the site by checking out one or more of the following:

  • The Cool Verification homepage, where you'll find my most recent posts.
  • As posts age, the best way to find them is via the tag cloud on the left side of the page (example: Specman) or via the archives on the right side (example: July 2005 - the month Cool Verification was started!). 
  • My bio, if you'd like to learn more about the author of this site.

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