Day one of my trip to DAC is over. Wanna know what I've been up to? You may want to head on over to the Verilab website to find out.
Recent Posts
- DVCon 2012: The Resurgence of Chip Design
- UVM and the Death of SystemVerilog
- 48th DAC Day 1: Cloud Computing, Registers
- Project Planning Birds-of-a-Feather at 48th DAC?
- Cool Verification on Facebook, Twitter
- Free Panel, and Photos from DVCon 2011 Day 2
- California Academy of Sciences Photos
- DVCon 2011: What engineers don't know about making great products
- DVCon 2011 Starts with a Bang: UVM Tutorial
- Virtual Panel Discussion: System Level Verification on Thursday, November 18
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June 05, 2007
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